Paulo Flores received a Ph.D. degree in Electrical and Computer Engineering (ECE) from the Instituto Superior Técnico (IST) in 2001. He is an Associate Professor in the Department of Electrical and Computer Engineering (DEEC) at IST (University of Lisbon) and a Senior Researcher of the High Performance Computing Architectures and Systems (HPCAS) group of INESC-ID. Paulo Flores is the Coordinator of the Master in Electronics Engineering (MEE). He has contributed to more than 130 research and teaching manuscripts and is a Senior Member of IEEE.

Research interests

Computer Architecture
Embedded Systems
Reconfigurable Computing
FPGAs
High Level Synthesis
VHDL
Optimization Algorithms
Design Automation
High Performance Computing
RISC-V

Field of Research (FOS)

Electrical engineering, electronic engineering, information engineering

External profiles

DBLP: homepages/40/6116
ORCID: 0000-0003-2970-3589
Scopus: 56357901100
Ciência ID: BF1D-DEA4-6418

Paulo Ferreira Godinho Flores

Supervised publications

Paulo Ferreira Godinho Flores

Research interests

Field of Research (FOS)

External profiles

Scientific production